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Department
Electrical and Computer Engineering
Categories
Faculty
Location
201 Davis Marksbury Building
Phone
859-257-6143
Email
SayedSalehi@uky.edu

Research interests:

  • Energy-efficient, high-throughput VLSI circuits for deep learning and IoT applications
  • Stochastic and approximate computation circuits inspired by molecular systems
  • Efficient signal processing architectures and design automation tools
  • DNA computing and molecular programming

I am looking for motivated students and postdocs in my research area. If you are interested please email me with your CV. 

Education

Ph.D., University of Minnesota, Electrical & Computer Engineering, Computer Science Minor


News

  • CUT Lab releases FUNDNA Software to automatically generate DNA circuits and sequences for computing mathematical functions(https://github.com/CUT-Labs), May 2024
  • I am invited to serve as the track chair for “IEEE International Symposium on Smart Electronic Systems 2024”, March 2024
  • Shad Hasin joins DNA computing research group at CUT Lab as a PhD student, welcome Shad!, January 2024
  • CUT Lab releases FUNSC Software tool to automatically generate stochastic computing circuits to approximate mathematical functions (https://github.com/CUT-Labs), October 2023
  • Supreeth successfully defends his PhD dissertation and joins Applied Material Co., India, congratulations Dr. Supreeth! April 2023
  •  Audrey and Jackson win ECE Undergraduate Research Fellowship, congratulations!  Fall 2023
  • FUNDNA Team wins silver (2nd rank) award in BIOMOD competition in Japan (http://biomod.net/winners/), congratulations! November 2023
  • CUT Lab establishes the first iGEM team in Kentucky, called FUNDNA Team.The team includes four undergraduate researchers and two mentors, April 2023
  • Dr. Kit Donohue joins DNA research group in CUT Lab as a postdoc fellow, welcome Dr. Kit!, March 2023
  • Prakash Dhungana joins CUT Lab as a PhD student, welcome Prakash!, January 2023
  • Luke graduated and joins Lexmark as a firmware engineer, congratulations Luke! July 2022
  • Our paper nominated for the best student paper award in Asilomar conference on signals, systems, and computers 2022, congratulations Stephen
  • Jackson wins Chellgren Center for Undergraduate Excellence membership award, congratulations Jackson!Spring 2022
  • Jackson Huse joins the DNA computing research group in CUT Lab as an undergraduate research student. Welcome Jackson! February 2022
  • Audrey Harper joins the DNA computing research group in CUT Lab as an undergraduate research student. Welcome Audrey! January 2022
  • Luke wins ECE Undergraduate Research Fellowship, congratulations!  Fall 2021
  • CUT lab receives a grant from NSF for interdisciplinary research on stochastic computing and photonics. October 2021
  • CUT lab receives a grant from NSF for its DNA computing research.October 2021
  • I am invited to organize computing with unconventional technologies (CUT) workshop. August 2021
  • Luke Mullikin joins the DNA computing research group in CUT Lab as an undergraduate research student. Welcome Luke! July 2021
  • Our paper, "ATRIA: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-DRAM CNN Processing", selected as a candidate for the best paper award in ISVLSI2021. Congratulation Supreeth! July 2021
  • I am invited as a co-author for "The Art of Molecular Programming" book and to the Faculty Advisory Board of the project. July 2021
  • Our paper on stochastic computing accepted in ISVLSI 2021, Congratulation to Chris. July 2021
  • Our paper on pattern formation for swarm robots published in ICARA 2021. Congratulation Chase! June 2021
  • Two papers accepted at ISVLSI2020. May 2020
  • Our paper about SNGs published at IEEE TVLSI, (available at: https://doi.org/10.1109/TVLSI.2019.2963678), January 2020
  • I serve as a Session Chair at IEEE GlobalSIP 2019 for the session, "GS: Hardware and Real-Time Implementations", November 2019 
  • Supreeth selected for ESWEEK Student Travel Grant. Congratulations! September 2019
  • Our paper about Stochastic Computing accepted at IEEE GlobalSIP 2019, Ottawa, ON, September 2019 
  • Our paper, "WIP : A Scalable Stochastic Number Generator for Phase Change Memory Based In-Memory Stochastic Processing", accepted at IEEE/ACM CODES+ISSS, New York City, NY, August 2019
  • I am co-organizing a workshop on Computing with Unconventional Technologies (CUT) at IEEE IGSCC 2019, Alexandria, VA, July 2019
  • I present a workshop talk titled: "DNA-based Machine Learning Using Factorial Coding" at The First International Workshop on Theoretical and Experimental Material Computing, Tokyo, June 2019
  • Our paper, "DNA Computing Units Based on Fractional Coding", accepted at Unconventional Computation and Natural Computation Conference (UCNC2019), June 2019

Publications

For updated list of my publications please visit my Google Scholar profile

  • S.A. Salehi, "An Area and Power Efficient Architecture for Linear Prediction-Error Filters Based on Split Schur Algorithm," Proc. of 2018 Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, Nov. 2018. (Conference)
  • S.A. Salehi, X. Liu, M.D. Riedel, and K.K. Parhi, "Computing Mathematical Functions using DNA via Fractional Coding," Scientific Reports, nature.com, Vol. 8, Article 8312, May. 2018. (Journal)
  • S.A. Salehi, Y. Lin, M.D. Riedel, and K.K. Parhi, "Computing Polynomials with Positive Coefficients using Stochastic Logic by Double-NAND Expansion," Proc. 2017 ACM Great Lakes Symposium on VLSI (GLSVLSI), Banff, Canada, pp. 471-474, May 2017.(Conference)
  • S.A. Salehi, K.K. Parhi, and M.D. Riedel, "Chemical Reaction Networks for Computing Polynomials," ACS Synthetic Biology, 6(1), pp. 76-83, Jan. 2017. (Journal)
  • S.A. Salehi, H. Jiang, M.D. Riedel, and K.K. Parhi, " Molecular Sensing and Computing Systems (Invited Paper)," IEEE Transactions on Molecular, Biological, and Multi-Scale Communications, 1(3), pp. 249-264, Mar. 2016. (Journal)
  • S.A. Salehi, M.D. Riedel, and K.K. Parhi, "Markov Chain Computations using Molecular Reactions," Proc. 2015 IEEE International Conference on Digital Signal Processing (DSP), pp. 689-693, Singapore, July 2015. (Best paper award finalist), (Conference)
  • S.A. Salehi, M.D. Riedel, and K.K. Parhi, "Asynchronous Discrete-time Signal Processing with Molecular Reactions," Proc. of 2014 Asilomar Conference on Signals, Systems, and Computers, pp. 1767-1772, Pacific Grove, CA, Nov. 2014. (Conference)
  • S.A. Salehi, R. Amirfattahi, and K.K. Parhi, "Pipelined Architectures for Real-Valued FFT and Hermitian-Symmetric IFFT with Real   Datapaths," IEEE Trans. Circuits and Systems-II: Transactions Briefs, 60(8), pp. 507-511, Aug. 2013. (Journal)
  • S.A. Salehi, R. Amirfattahi, and K.Parhi, "Efficient Folded VLSI Architectures for Linear Prediction Error Filters,"  In proceeding of the GLSVLSI2012, ACM, New York, NY, USA, 2012.
  • S.A. Salehi, R. Amirfattahi, ‘VLSI Architectures of Lifting-Based Discrete Wavelet Transform’ in DWT- Algorithms and Applications, Hannu Olkkonen (Editor) InTech 2011. (Book chapter)

Computing with Unconventional Technologies (CUT) LAB

Electronic computers have become dominant computing technology since the invention of transistor in 1947. But, inadequate response of semiconductor technology to emerging needs in performing computation has compelled researchers to investigate unconventional techniques and technologies for computation. The main research in CUT lab focuses on this direction and has two main themes. 1) We study techniques such as stochastic and approximate computing to design efficient and low-cost digital circuits for computationally intensive applications such as deep learning, big data, and the internet-of-things (IoT). 2) We investigate unconventional technologies such as biomolecular and DNA computing systems for performing computation in environments incompatible with electronic circuits.

Machine Learning on Embedded Systems

Tiny ML

Due to their outstanding predictive performance, deep neural networks (DNNs) have emerged as popular tools for various applications with classification and decision-making tasks. Efficient hardware implementation of DNNs plays a key role in numerous emerging fields including the Internet of things (IoT), smart mobile and implantable devices, autonomous vehicles, and so on. In particular, with the explosion of IoT, edge computing is becoming more essential; devices on the edge of IoT gather so much data that sharing them with cloud and data centers for central processing requires larger, faster, and more expensive and secure connections. Thus, it is more reliable and economical to perform real-time processing within the devices on the edge with constrained resources. This project studies the implementation of DNNs for real-time and battery-operated devices and tries to address the challenge by investigating different methods including model compression for DNNs, pruning, encoding, quantization, and  approximate computing.

Processing-In-Memory Using Stochastic Computing

ATRIA

Stochastic computing (SC) has emerged as an unconventional technique for performing computations by logic circuits. Rather than performing computation on binary numbers, SC circuits are designed to process unary numbers. The input and output are represented by bit streams and their values are encoded as the number of 1’s in these bit streams. Compared to traditional binary computing, SC provides several advantages including reduced hardware complexity and fault-tolerant computing. Because of these advantages, SC has been considered as an appropriate alternative to binary computing in different applications such as image processing, neural networks, low-density parity check (LDPC) decoding, and digital filters. One main advantage of SC is its very low hardware-complexity that could result in cost-efficient computing circuits. The most common way to demonstrate the low hardware-cost of SC is its implementation of multiplication: a simple AND gate implements multiplication in SC. Our group works on new application-driven architectures based on SC and also efficient techniques to generate appropriate input bit streams for SC circuits.

FPGA and VLSI Architectures for Digital Signal Processing

Page Visi

Electronic circuits are used to process various types of signals in applications.  We try to design low-power and low-area VLSI and FPGA circuits for resource-constraint environments  such as mobile and implantable devices. Our research considers hardware optimization of DSP systems in different levels from algorithm to circuit.

Biomolecular and DNA Computing and Storage

DNA CPU

When we hear about computation and information processing the first thing that comes to our minds is man-made electronic processing systems. However, computation is not a man-made phenomenon and, in fact, the most powerful information processing systems have been provided by nature. For example, complex circuits within cells

  • can have over 30,000 distinct states;
  • their computational efficiency per operation is 4 to 5 orders of magnitude more efficient than nano-scale GHz electronic processors regarding energy and size;
  • they are massively parallel such that more than 10,000,000 biochemical reactions fire in a human cell each second.

Our research is about the exploration of computational power in bio-molecular systems. Since the chemical reaction network (CRN) theory is the fundamental model in the study of molecular reactions, we try to understand and discover the information processing abilities of CRNs and accordingly design new molecular systems for particular applications. One part of this research is the design of digital signal processing algorithms by CRNs. Another part is the computation of mathematical functions by CRNs using a new encoding of information so called fractional representation. In order to address practical issues for biological implementation of these designs, we map the CRNs to DNA reactions using DNA strand-displacement mechanism. Applications for our research are drug delivery and monitoring, smart and personalized drugs.

Further, we work on encoding and storing information by DNA molecules as they have the potential to be used as future memories with longer retention, higher density  and lower power consumption compared to semiconductor memories. Also we are interested in the interface of biological circuits (e.g., DNA and RNA molecules) with semiconductor circuits and sensors.